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02.10.26 - 05:43
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DIGITIMES Insight: Intel, TSMC, Samsung converge on backside power — packaging becomes the next divide (Digitimes)
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Data center AI accelerator package power has climbed from about 500W in the A100 generation to roughly 3,500–4,000W for Rubin Ultra-class products expected in 2027, pushing supply current into the thousands of amperes. In conventional frontside power delivery, current must cross the full metal interconnect stack before reaching the transistors, while power and signal lines compete for routing resources. Intel Foundry estimates that raising a single compute package from 1kW to 5kW increases power delivery network I²R losses from 89W to 2,222W, cutting the share of input power reaching the transistors from 66.0% to 41.8%....
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02.10.26 - 05:07
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Micron eyes NVHBM profits with TSMC custom HBM push (Digitimes)
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Micron is using an externally manufactured base die in NVHBM, a custom high-bandwidth memory (HBM) product it is co-developing with Nvidia, as the company bets that customization can unlock added value even when manufacturing is outsourced. The move underscores how HBM competition is expanding beyond memory stacks into logic circuitry and system integration....
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02.10.26 - 05:07
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TSMC, NTU deepen R&D ties through nearly 50 projects a year (Digitimes)
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National Taiwan University's Graduate School of Advanced Technology (GSAT) has expanded its semiconductor research capabilities with new process and measurement equipment, strengthening links among universities, industry, and international partners as Taiwan seeks to maintain its edge in an increasingly competitive AI-driven semiconductor sector....
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01.10.26 - 08:06
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Four glass makers converge on 510x515mm substrate, hinting at TSMC′s next move (Digitimes)
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As AI chip sizes scale up, global glass leaders Corning, AGC, Nippon Electric Glass (NEG), and Schott have all centered their next-generation core substrate and through-glass via (TGV) roadmaps on a unified 510×515mm format. The tight alignment strongly suggests that Taiwan Semiconductor Manufacturing Co. (TSMC) is eyeing this exact specification for its post-2030 glass substrate platform....
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01.10.26 - 04:06
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DIGITIMES Insight: AI scaling is moving from chip shrinkage to system integration (Digitimes)
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TSMC said the next phase of AI performance growth will depend less on shrinking a single chip and more on combining multiple chips, memory, and advanced packaging inside larger systems. The shift could reshape semiconductor competition, as demand for compute, bandwidth, power delivery, and cooling rises in tandem. The company outlined the trend at its heterogeneous integration forum during SEMICON Taiwan 2026, saying AI computing transistors in a single CoWoS package are set to rise more than 48-fold by 2029 from 2024 levels, while total HBM bandwidth is expected to increase more than 34-fold....
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01.10.26 - 02:48
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How a TSMC veteran is steering Singapore′s lab-to-fab chip strategy (Digitimes)
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Yee-Chia Yeo, vice president for innovation and enterprise at A*STAR, returned to Singapore in 2022 and has since turned years of industry experience into a strategy for advancing the city-state's semiconductor R&D and industry development. He is helping build a semiconductor model that differs from Taiwan's, with a focus on linking research more closely to manufacturing needs....
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